The terms "assert", "assertion", "negate" and "negation" will be used to avoid confusion when dealing with a mixture of "active high" and "active low" signals. "Assert" and "assertion" are used to indicate that a signal is rendered active, or true. "Negate" and "negation" are used to indicate that a signal is rendered inactive, or false. In some instances, in order to accomodate standard usage, "set" or "setting" may be used in the place of "assert" or "assertion" and "clear" or "clearing" may be used in the place of "negate" or "negation".
In a digital data processing system, a status flag is a single bit of data which is stored in a status register. The processing system sets a status flag to indicate a current condition of the processing system, a result of some previously executed operation or some other factor which must be acted upon or taken into account when taking subsequent action. An example is a timer overflow flag which is set by the processing system when a counter containing a timer value overflows.
A particular status flag may be stored as one bit in a register which contains other status flags and perhaps other similar data values such as function control bits. Once the status flag has been set, it is read and cleared under control of the user through software. It is desireable that any scheme for the handling of status flags have the following characteristics, among others: (1) the scheme should protect against the inadvertant alteration of other bits in the status register when a particular status flag is read or cleared; (2) the scheme should protect against errors caused by interrupts which occur during status flag operations; (3) the scheme should protect against the clearing of a status flag prior to its being read in its asserted state; (4) the scheme should protect against the setting of a status flag while it is being read; and (5) the scheme should provide simplicity in the commands used for status flag handling and in their usage.
A common prior art status flag handling scheme involves a read-modify-write sequence when clearing a status flag. The status register is loaded into an accumulator (read), the contents of the accumulator are operated on to negate the bit corresponding to the status flag being cleared (modify) and the modified contents of the accumulator are stored back into the status register (write). This scheme is subject to inadvertant alteration of other bits in the status register, to errors caused by intervening interrupts and is not particularly efficient in terms of the code required to clear a status flag.
Suppose, for instance, that a timer overflows while the contents of the status register are being modified in the accumulator. The processing system will set the timer overflow flag bit in the status register, but the corresponding bit in the accumulator will not be changed. The subsequent transfer from the accumulator to the status register may inadvertantly clear the timer overflow flag. Similarly, interrupts which occur while a status flag is being cleared may cause the alteration of other status flags or function control bits in the status register, resulting in an error when the accumulator is stored back to the status register. Finally, the requirement of three instructions to clear one flag is not particularly efficient.
It is possible, by the use of additional instructions, to generate a read-modify-write technique which safeguards against inadvertant status flags clearing. However, intervening interrupts are still a source of errors and the code is rendered even less efficient. Other status flag handling schemes are known, but none are known which adequately satisfies each of the criteria set forth above.